⚡ When people talk SiC, they mean EV power chips. Inverters, fast chargers, solar farms — the stuff Wolfspeed, onsemi, Infineon and STMicro are fighting over in a $2.7-billion-and-growing market. But there's a quieter SiC story playing out in a Kyoto University lab, and it has nothing to do with switching kilowatts. It's about making analog and digital chips that survive where silicon dies — and sampling them to real customers by 2028.

"Power SiC" and "LSI SiC" are not the same thing

Silicon carbide is currently riding an electric-vehicle wave. Mordor Intelligence estimates the SiC power semiconductor market at roughly $2.73 billion in 2025, climbing to about $8.41 billion by 2030, with five companies — STMicroelectronics, Infineon, Wolfspeed, onsemi and ROHM — controlling more than 90% of revenue. These chips are essentially big, fast switches: they push electrons through EV traction inverters, solar power conditioners and industrial drives with less loss than silicon.

But "switching big power" and "doing computation or sensing on a chip" are very different jobs. The chips inside your phone, in a car's ECU, or on a factory PLC are LSIs — large-scale integrated circuits — packing hundreds or thousands of transistors that crunch signals rather than throw watts around. Almost nobody makes those on SiC. They're done on silicon, because silicon is cheap, easy to process and well understood.

Mitsuaki Kaneko, an associate professor at Kyoto University's Graduate School of Engineering, is working on the other kind. In an interview with EE Times Japan, Kaneko explained that he is developing high-temperature SiC LSIs and pursuing commercialization, starting with an analog-to-digital converter (ADC) for harsh environments, with sample shipments targeted for around 2028 to 2029.

An ADC is the bridge between the messy analog world — temperatures, currents, vibrations — and digital systems. Almost every piece of industrial equipment has one. Kaneko's bet is that if you can build one that keeps working well past 150°C, suddenly you can put it in places engineers currently treat as no-go zones.

Why bother with the places silicon can't reach?

Standard silicon chips top out around 150°C. With specialised silicon-on-insulator processes, you can push that to roughly 300°C, but no further. Above that, the carriers in silicon get so excited that the transistor stops behaving like a transistor.

The places that matter live above that line: right next to an EV traction motor, inside an industrial furnace controller, around a jet engine, in a geothermal well, on a space probe. Today, engineers either move the silicon far away from the heat — long noisy wires, slower response — or wrap it in cooling and shielding. Either choice costs space, weight and money.

SiC has a bandgap roughly three times wider than silicon. In theory it can keep working past 500°C, and in practice teams have shown circuits do exactly that — Kaneko's group demonstrated basic SiC integrated-circuit operation at 350°C back in 2022, and NASA Glenn Research Center has shown SiC parts running at temperatures pushing 1,000°C in earlier work. If a chip can sit right next to the heat, you can dispense with cooling, run shorter wires, and digitise the signal at the source.

The Kyoto approach: "complementary JFETs," and why that matters

Multiple groups around the world are chasing SiC ICs, but they have made different bets on circuit style. As Kaneko outlined in the EE Times interview:

  • NASA / Ozark Integrated Circuits (US): JFETs (junction field-effect transistors) plus resistors. This is the long-running Venus-exploration heritage, licensed by Fayetteville-based Ozark IC to address aerospace, defense and oil-and-gas customers.
  • Hiroshima University (Japan): Complementary MOSFETs. Closer to the CMOS recipe that dominates silicon today.
  • Kyoto University (Japan): Complementary JFETs. According to Kaneko, this approach can substantially reduce power consumption compared with the NASA-style resistor-load circuits.

"Complementary" is the trick at the heart of every modern CPU: pair an n-type transistor (electrons carrying current) with a p-type one (holes carrying current) so that, in either state, almost no current flows except when the circuit switches. That's why your laptop battery doesn't die in five minutes despite running billions of transistors. Kyoto's team is trying to bring that same low-static-power discipline to SiC, but using JFETs instead of MOSFETs because the SiC MOS interface is notoriously hard to make clean — defects there have throttled SiC transistor performance for decades.

Kaneko also offered a global snapshot in the interview: the US has strong demand for high-temperature LSIs from NASA, energy, aerospace and defense. China, he noted, has built serious momentum in SiC power devices, but he hasn't seen visible evidence of an aggressive SiC LSI development effort there.

What changed in 2025: a commercial vehicle

Lab demos and shipping a real chip are different worlds. A research transistor at 350°C is impressive; making a few hundred of them behave identically, wafer after wafer, with proven 10-year reliability, is something else entirely. That's the part universities can rarely do alone.

In October 2025, a new vehicle appeared on Kaneko's researchmap profile: a project titled "Realisation of SiC logic semiconductors (LSIs) operable in high-temperature environments," running until September 2026 under the Kyoto University × Mitsubishi Corporation Startup Catapult program. The Catapult is a structured bridge between university research and commercial startup, with a sogo-shosha (general trading company) attached. That matters: Mitsubishi Corporation has the kind of global reach into aerospace, energy and industrial supply chains that a university spin-out typically lacks. If the eventual startup needs to find an aerospace customer in the US or an energy customer in Europe, those doors open faster.

The bigger picture: Japan's power semiconductor reshuffle

Kaneko's commercialization push lands in the middle of a noisy year for Japanese power semiconductors. In March 2026, ROHM, Toshiba and Mitsubishi Electric announced talks to integrate their power semiconductor businesses — a potential number-two global player by scale, if it goes through. Roughly in parallel, Denso, the Toyota-affiliated auto-parts giant, made a takeover approach to ROHM, reflecting how strategically power chips have become for the automotive supply chain.

Globally, Wolfspeed — once the SiC pioneer — filed for Chapter 11 bankruptcy in 2025 after struggling with 8-inch wafer yields, and emerged later that year as a restructured company. Infineon's 200mm SiC mega-fab in Malaysia is now online. Chinese substrate makers like SICC and TanKeBlue are pushing on price and 8-inch.

The "power SiC" layer is a brutal global brawl. What Kyoto is doing sits adjacent to it. Mixed-signal SiC LSI is, in a sense, not trying to fight Wolfspeed and Infineon on their own ground — it's a smaller, higher-value, harder-to-replace niche. That's a reasonable position for a Japanese university spin-out: not enormous volumes, but defensible technology that the big five aren't focused on.

What still has to go right

Three things will decide whether this graduates from "interesting paper" to "things you can buy."

Process maturity. Demonstrating a working transistor is not the same as yielding hundreds of them with matched characteristics on a manufacturing-grade wafer. SiC fabs exist, but they were built for power MOSFETs and Schottky diodes, not for analog/digital LSIs with tight matching requirements. Establishing the complementary-JFET flow at a foundry-grade fab is the first wall.

Long-term reliability data. Automotive and industrial customers want 10 to 15 years of confidence, and that means thousands of hours of high-temperature life testing before anyone designs the chip into a product. NASA-track parts have that pedigree; commercial SiC LSI doesn't yet.

A first customer. New analog/digital chips don't ship without a system maker willing to be the first design-in. Ozark IC's anchor is NASA. Kyoto's startup will need its own anchor — likely an aerospace, defense or industrial player — to justify pilot production.

Kaneko's group has been racking up credentials in the meantime. A paper he co-authored received the John Palmour Best Student Paper Award at ICSCRM 2024, his complementary-JFET work has appeared in IEEE Electron Device Letters demonstrating logic gate operation at 623 K (350°C), and a SPICE modeling paper in APL Electronic Devices was selected as an Editor's Pick. The academic foundation is there.

Japan's "other SiC" story

Most of the SiC inside the EVs of the next decade will still come from Infineon, STMicro and onsemi. The Japanese players have a tough fight in that race.

But there's a quieter Japanese SiC story being written in parallel — one where the chips don't switch kilowatts but listen to sensors and talk to digital systems at temperatures silicon can't handle. If Kyoto's ADC samples land on customer benches in 2028 or 2029, and if Mitsubishi Corporation's network can plug them into real aerospace, energy or industrial programs, Japan will have planted a flag in a niche the global SiC giants have walked past.

It's not the headline trillion-yen market. But it's a market with very few competitors, very high switching costs once you're designed in, and applications — EV battery monitoring, jet engine sensing, downhole tools, future planetary missions — that simply don't have a silicon alternative.

In Japan, this "other SiC" plays out alongside the noisier power-chip merger drama. How is your country approaching high-temperature electronics? Are universities and trading companies set up to commercialise this kind of niche, long-horizon semiconductor work where you live?

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